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✏️ /usr/src/linux-headers-6.8.0-124/arch/mips/include/asm/cmpxchg.h

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/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
 */
#ifndef __ASM_CMPXCHG_H
#define __ASM_CMPXCHG_H

#include <linux/bug.h>
#include <linux/irqflags.h>
#include <asm/asm.h>
#include <asm/compiler.h>
#include <asm/sync.h>

/*
 * These functions doesn't exist, so if they are called you'll either:
 *
 * - Get an error at compile-time due to __compiletime_error, if supported by
 *   your compiler.
 *
 * or:
 *
 * - Get an error at link-time due to the call to the missing function.
 */
extern unsigned long __cmpxchg_called_with_bad_pointer(void)
	__compiletime_error("Bad argument size for cmpxchg");
extern unsigned long __cmpxchg64_unsupported(void)
	__compiletime_error("cmpxchg64 not available; cpu_has_64bits may be false");
extern unsigned long __xchg_called_with_bad_pointer(void)
	__compiletime_error("Bad argument size for xchg");

#define __xchg_asm(ld, st, m, val)					\
({									\
	__typeof(*(m)) __ret;						\
									\
	if (kernel_uses_llsc) {						\
		__asm__ __volatile__(					\
		"	.set	push				\n"	\
		"	.set	noat				\n"	\
		"	.set	push				\n"	\
		"	.set	" MIPS_ISA_ARCH_LEVEL "		\n"	\
		"	" __SYNC(full, loongson3_war) "		\n"	\
		"1:	" ld "	%0, %2		# __xchg_asm	\n"	\
		"	.set	pop				\n"	\
		"	move	$1, %z3				\n"	\
		"	.set	" MIPS_ISA_ARCH_LEVEL "		\n"	\
		"	" st "	$1, %1				\n"	\
		"\t" __stringify(SC_BEQZ)	"	$1, 1b	\n"	\
		"	.set	pop				\n"	\
		: "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m)		\
		: GCC_OFF_SMALL_ASM() (*m), "Jr" (val)			\
		: __LLSC_CLOBBER);					\
	} else {							\
		unsigned long __flags;					\
									\
		raw_local_irq_save(__flags);				\
		__ret = *m;						\
		*m = val;						\
		raw_local_irq_restore(__flags);				\
	}								\
									\
	__ret;								\
})

extern unsigned long __xchg_small(volatile void *ptr, unsigned long val,
				  unsigned int size);

static __always_inline
unsigned long __arch_xchg(volatile void *ptr, unsigned long x, int size)
{
	switch (size) {
	case 1:
	case 2:
		return __xchg_small(ptr, x, size);

case 4:
		return __xchg_asm("ll", "sc", (volatile u32 *)ptr, x);

case 8:
		if (!IS_ENABLED(CONFIG_64BIT))
			return __xchg_called_with_bad_pointer();

return __xchg_asm("lld", "scd", (volatile u64 *)ptr, x);

default:
		return __xchg_called_with_bad_pointer();
	}
}

#define arch_xchg(ptr, x)						\
({									\
	__typeof__(*(ptr)) __res;					\
									\
	/*								\
	 * In the Loongson3 workaround case __xchg_asm() already	\
	 * contains a completion barrier prior to the LL, so we don't	\
	 * need to emit an extra one here.				\
	 */								\
	if (__SYNC_loongson3_war == 0)					\
		smp_mb__before_llsc();					\
									\
	__res = (__typeof__(*(ptr)))					\
		__arch_xchg((ptr), (unsigned long)(x), sizeof(*(ptr)));	\
									\
	smp_llsc_mb();							\
									\
	__res;								\
})

#define __cmpxchg_asm(ld, st, m, old, new)				\
({									\
	__typeof(*(m)) __ret;						\
									\
	if (kernel_uses_llsc) {						\
		__asm__ __volatile__(					\
		"	.set	push				\n"	\
		"	.set	noat				\n"	\
		"	.set	push				\n"	\
		"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"	\
		"	" __SYNC(full, loongson3_war) "		\n"	\
		"1:	" ld "	%0, %2		# __cmpxchg_asm \n"	\
		"	bne	%0, %z3, 2f			\n"	\
		"	.set	pop				\n"	\
		"	move	$1, %z4				\n"	\
		"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"	\
		"	" st "	$1, %1				\n"	\
		"\t" __stringify(SC_BEQZ)	"	$1, 1b	\n"	\
		"	.set	pop				\n"	\
		"2:	" __SYNC(full, loongson3_war) "		\n"	\
		: "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m)		\
		: GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new)	\
		: __LLSC_CLOBBER);					\
	} else {							\
		unsigned long __flags;					\
									\
		raw_local_irq_save(__flags);				\
		__ret = *m;						\
		if (__ret == old)					\
			*m = new;					\
		raw_local_irq_restore(__flags);				\
	}								\
									\
	__ret;								\
})

extern unsigned long __cmpxchg_small(volatile void *ptr, unsigned long old,
				     unsigned long new, unsigned int size);

static __always_inline
unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
			unsigned long new, unsigned int size)
{
	switch (size) {
	case 1:
	case 2:
		return __cmpxchg_small(ptr, old, new, size);

case 4:
		return __cmpxchg_asm("ll", "sc", (volatile u32 *)ptr,
				     (u32)old, new);

case 8:
		/* lld/scd are only available for MIPS64 */
		if (!IS_ENABLED(CONFIG_64BIT))
			return __cmpxchg_called_with_bad_pointer();

return __cmpxchg_asm("lld", "scd", (volatile u64 *)ptr,
				     (u64)old, new);

default:
		return __cmpxchg_called_with_bad_pointer();
	}
}

#define arch_cmpxchg_local(ptr, old, new)				\
	((__typeof__(*(ptr)))						\
		__cmpxchg((ptr),					\
			  (unsigned long)(__typeof__(*(ptr)))(old),	\
			  (unsigned long)(__typeof__(*(ptr)))(new),	\
			  sizeof(*(ptr))))

#define arch_cmpxchg(ptr, old, new)					\
({									\
	__typeof__(*(ptr)) __res;					\
									\
	/*								\
	 * In the Loongson3 workaround case __cmpxchg_asm() already	\
	 * contains a completion barrier prior to the LL, so we don't	\
	 * need to emit an extra one here.				\
	 */								\
	if (__SYNC_loongson3_war == 0)					\
		smp_mb__before_llsc();					\
									\
	__res = arch_cmpxchg_local((ptr), (old), (new));		\
									\
	/*								\
	 * In the Loongson3 workaround case __cmpxchg_asm() already	\
	 * contains a completion barrier after the SC, so we don't	\
	 * need to emit an extra one here.				\
	 */								\
	if (__SYNC_loongson3_war == 0)					\
		smp_llsc_mb();						\
									\
	__res;								\
})

#ifdef CONFIG_64BIT
#define arch_cmpxchg64_local(ptr, o, n)					\
  ({									\
	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
	arch_cmpxchg_local((ptr), (o), (n));				\
  })

#define arch_cmpxchg64(ptr, o, n)					\
  ({									\
	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
	arch_cmpxchg((ptr), (o), (n));					\
  })
#else

# include <asm-generic/cmpxchg-local.h>
# define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n))

# ifdef CONFIG_SMP

static inline unsigned long __cmpxchg64(volatile void *ptr,
					unsigned long long old,
					unsigned long long new)
{
	unsigned long long tmp, ret;
	unsigned long flags;

/*
	 * The assembly below has to combine 32 bit values into a 64 bit
	 * register, and split 64 bit values from one register into two. If we
	 * were to take an interrupt in the middle of this we'd only save the
	 * least significant 32 bits of each register & probably clobber the
	 * most significant 32 bits of the 64 bit values we're using. In order
	 * to avoid this we must disable interrupts.
	 */
	local_irq_save(flags);

asm volatile(
	"	.set	push				\n"
	"	.set	" MIPS_ISA_ARCH_LEVEL "		\n"
	/* Load 64 bits from ptr */
	"	" __SYNC(full, loongson3_war) "		\n"
	"1:	lld	%L0, %3		# __cmpxchg64	\n"
	"	.set	pop				\n"
	/*
	 * Split the 64 bit value we loaded into the 2 registers that hold the
	 * ret variable.
	 */
	"	dsra	%M0, %L0, 32			\n"
	"	sll	%L0, %L0, 0			\n"
	/*
	 * Compare ret against old, breaking out of the loop if they don't
	 * match.
	 */
	"	bne	%M0, %M4, 2f			\n"
	"	bne	%L0, %L4, 2f			\n"
	/*
	 * Combine the 32 bit halves from the 2 registers that hold the new
	 * variable into a single 64 bit register.
	 */
#  if MIPS_ISA_REV >= 2
	"	move	%L1, %L5			\n"
	"	dins	%L1, %M5, 32, 32		\n"
#  else
	"	dsll	%L1, %L5, 32			\n"
	"	dsrl	%L1, %L1, 32			\n"
	"	.set	noat				\n"
	"	dsll	$at, %M5, 32			\n"
	"	or	%L1, %L1, $at			\n"
	"	.set	at				\n"
#  endif
	"	.set	push				\n"
	"	.set	" MIPS_ISA_ARCH_LEVEL "		\n"
	/* Attempt to store new at ptr */
	"	scd	%L1, %2				\n"
	/* If we failed, loop! */
	"\t" __stringify(SC_BEQZ) "	%L1, 1b		\n"
	"2:	" __SYNC(full, loongson3_war) "		\n"
	"	.set	pop				\n"
	: "=&r"(ret),
	  "=&r"(tmp),
	  "=" GCC_OFF_SMALL_ASM() (*(unsigned long long *)ptr)
	: GCC_OFF_SMALL_ASM() (*(unsigned long long *)ptr),
	  "r" (old),
	  "r" (new)
	: "memory");

local_irq_restore(flags);
	return ret;
}

#  define arch_cmpxchg64(ptr, o, n) ({					\
	unsigned long long __old = (__typeof__(*(ptr)))(o);		\
	unsigned long long __new = (__typeof__(*(ptr)))(n);		\
	__typeof__(*(ptr)) __res;					\
									\
	/*								\
	 * We can only use cmpxchg64 if we know that the CPU supports	\
	 * 64-bits, ie. lld & scd. Our call to __cmpxchg64_unsupported	\
	 * will cause a build error unless cpu_has_64bits is a		\
	 * compile-time constant 1.					\
	 */								\
	if (cpu_has_64bits && kernel_uses_llsc) {			\
		smp_mb__before_llsc();					\
		__res = __cmpxchg64((ptr), __old, __new);		\
		smp_llsc_mb();						\
	} else {							\
		__res = __cmpxchg64_unsupported();			\
	}								\
									\
	__res;								\
})

# else /* !CONFIG_SMP */
#  define arch_cmpxchg64(ptr, o, n) arch_cmpxchg64_local((ptr), (o), (n))
# endif /* !CONFIG_SMP */
#endif /* !CONFIG_64BIT */

#endif /* __ASM_CMPXCHG_H */

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⬅ include 234 item

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📁 dec	dir	—	15/06/26 13:45	0755	📂
📁 fw	dir	—	15/06/26 13:45	0755	📂
📁 ip32	dir	—	15/06/26 13:45	0755	📂
📁 mach-ath25	dir	—	15/06/26 13:45	0755	📂
📁 mach-ath79	dir	—	15/06/26 13:45	0755	📂
📁 mach-au1x00	dir	—	15/06/26 13:45	0755	📂
📁 mach-bcm47xx	dir	—	15/06/26 13:45	0755	📂
📁 mach-bcm63xx	dir	—	15/06/26 13:45	0755	📂
📁 mach-bmips	dir	—	15/06/26 13:45	0755	📂
📁 mach-cavium-octeon	dir	—	15/06/26 13:45	0755	📂
📁 mach-cobalt	dir	—	15/06/26 13:45	0755	📂
📁 mach-db1x00	dir	—	15/06/26 13:45	0755	📂
📁 mach-dec	dir	—	15/06/26 13:45	0755	📂
📁 mach-generic	dir	—	15/06/26 13:45	0755	📂
📁 mach-ingenic	dir	—	15/06/26 13:45	0755	📂
📁 mach-ip22	dir	—	15/06/26 13:45	0755	📂
📁 mach-ip27	dir	—	15/06/26 13:45	0755	📂
📁 mach-ip28	dir	—	15/06/26 13:45	0755	📂
📁 mach-ip30	dir	—	15/06/26 13:45	0755	📂
📁 mach-ip32	dir	—	15/06/26 13:45	0755	📂
📁 mach-jazz	dir	—	15/06/26 13:45	0755	📂
📁 mach-lantiq	dir	—	15/06/26 13:45	0755	📂
📁 mach-loongson2ef	dir	—	15/06/26 13:45	0755	📂
📁 mach-loongson32	dir	—	15/06/26 13:45	0755	📂
📁 mach-loongson64	dir	—	15/06/26 13:45	0755	📂
📁 mach-malta	dir	—	15/06/26 13:45	0755	📂
📁 mach-n64	dir	—	15/06/26 13:45	0755	📂
📁 mach-pic32	dir	—	15/06/26 13:45	0755	📂
📁 mach-ralink	dir	—	15/06/26 13:45	0755	📂
📁 mach-rc32434	dir	—	15/06/26 13:45	0755	📂
📁 mach-rm	dir	—	15/06/26 13:45	0755	📂
📁 mach-sibyte	dir	—	15/06/26 13:45	0755	📂
📁 mach-tx49xx	dir	—	15/06/26 13:45	0755	📂
📁 mips-boards	dir	—	15/06/26 13:45	0755	📂
📁 octeon	dir	—	15/06/26 13:45	0755	📂
📁 pci	dir	—	15/06/26 13:45	0755	📂
📁 sgi	dir	—	15/06/26 13:45	0755	📂
📁 sibyte	dir	—	15/06/26 13:45	0755	📂
📁 sn	dir	—	15/06/26 13:45	0755	📂
📁 txx9	dir	—	15/06/26 13:45	0755	📂
📁 vdso	dir	—	15/06/26 13:45	0755	📂
📁 xtalk	dir	—	15/06/26 13:45	0755	📂
📄 Kbuild	file	392 B	10/03/24 20:38	0644	✏️ ⬇
📄 abi.h	h	853 B	10/03/24 20:38	0644	✏️ ⬇
📄 addrspace.h	h	3.9 KB	10/03/24 20:38	0644	✏️ ⬇
📄 amon.h	h	409 B	10/03/24 20:38	0644	✏️ ⬇
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📄 asm-offsets.h	h	35 B	10/03/24 20:38	0644	✏️ ⬇
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📄 asmmacro-32.h	h	2.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 asmmacro-64.h	h	1.2 KB	10/03/24 20:38	0644	✏️ ⬇
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📄 atomic.h	h	7.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 barrier.h	h	3.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 bcache.h	h	2 KB	10/03/24 20:38	0644	✏️ ⬇
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📄 cdmm.h	h	3.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cevt-r4k.h	h	823 B	10/03/24 20:38	0644	✏️ ⬇
📄 checksum.h	h	5.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 clocksource.h	h	273 B	10/03/24 20:38	0644	✏️ ⬇
📄 cmp.h	h	492 B	10/03/24 20:38	0644	✏️ ⬇
📄 cmpxchg.h	h	8.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 compat-signal.h	h	640 B	10/03/24 20:38	0644	✏️ ⬇
📄 compat.h	h	3.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 compiler.h	h	2.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cop2.h	h	1.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cpu-features.h	h	22.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cpu-info.h	h	6.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cpu-type.h	h	3.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cpu.h	h	16.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 cpufeature.h	h	510 B	10/03/24 20:38	0644	✏️ ⬇
📄 debug.h	h	447 B	10/03/24 20:38	0644	✏️ ⬇
📄 delay.h	h	841 B	10/03/24 20:38	0644	✏️ ⬇
📄 div64.h	h	2.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 dma-direct.h	h	255 B	10/03/24 20:38	0644	✏️ ⬇
📄 dma-mapping.h	h	349 B	10/03/24 20:38	0644	✏️ ⬇
📄 dma.h	h	9.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 dmi.h	h	547 B	10/03/24 20:38	0644	✏️ ⬇
📄 ds1287.h	h	333 B	26/05/26 09:55	0644	✏️ ⬇
📄 dsemul.h	h	3.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 dsp.h	h	1.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 edac.h	h	839 B	10/03/24 20:38	0644	✏️ ⬇
📄 elf.h	h	15.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 elfcore-compat.h	h	841 B	10/03/24 20:38	0644	✏️ ⬇
📄 errno.h	h	429 B	10/03/24 20:38	0644	✏️ ⬇
📄 eva.h	h	796 B	10/03/24 20:38	0644	✏️ ⬇
📄 exec.h	h	579 B	10/03/24 20:38	0644	✏️ ⬇
📄 extable.h	h	241 B	10/03/24 20:38	0644	✏️ ⬇
📄 fb.h	h	859 B	10/03/24 20:38	0644	✏️ ⬇
📄 fixmap.h	h	2.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 floppy.h	h	1.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 fpregdef.h	h	2.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 fpu.h	h	7.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 fpu_emulator.h	h	4.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 ftrace.h	h	2.7 KB	26/05/26 09:55	0644	✏️ ⬇
📄 futex.h	h	5.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 ginvt.h	h	1.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 gio_device.h	h	1.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 gt64120.h	h	18.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 hardirq.h	h	544 B	10/03/24 20:38	0644	✏️ ⬇
📄 hazards.h	h	8.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 highmem.h	h	1.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 hpet.h	h	1.9 KB	10/03/24 20:38	0644	✏️ ⬇
📄 hugetlb.h	h	2.2 KB	26/05/26 09:55	0644	✏️ ⬇
📄 hw_irq.h	h	475 B	10/03/24 20:38	0644	✏️ ⬇
📄 i8259.h	h	2.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 idle.h	h	727 B	10/03/24 20:38	0644	✏️ ⬇
📄 inst.h	h	2.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 io.h	h	16.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 irq.h	h	2.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 irq_cpu.h	h	427 B	10/03/24 20:38	0644	✏️ ⬇
📄 irq_gt641xx.h	h	2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 irq_regs.h	h	540 B	10/03/24 20:38	0644	✏️ ⬇
📄 irqflags.h	h	4.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 isa-rev.h	h	556 B	10/03/24 20:38	0644	✏️ ⬇
📄 isadep.h	h	573 B	10/03/24 20:38	0644	✏️ ⬇
📄 jazz.h	h	8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 jazzdma.h	h	2.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 jump_label.h	h	1.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 kdebug.h	h	303 B	10/03/24 20:38	0644	✏️ ⬇
📄 kexec.h	h	1.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 kgdb.h	h	1.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 kprobes.h	h	1.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 kvm_host.h	h	29.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 kvm_types.h	h	184 B	10/03/24 20:38	0644	✏️ ⬇
📄 linkage.h	h	306 B	10/03/24 20:38	0644	✏️ ⬇
📄 local.h	h	4.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 maar.h	h	4.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 machine.h	h	2.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mc146818-time.h	h	3.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mc146818rtc.h	h	450 B	10/03/24 20:38	0644	✏️ ⬇
📄 mips-cm.h	h	17 KB	26/05/26 09:55	0644	✏️ ⬇
📄 mips-cpc.h	h	5.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mips-cps.h	h	6.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mips-gic.h	h	12.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mips-r2-to-r6-emul.h	h	2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mips_mt.h	h	707 B	10/03/24 20:38	0644	✏️ ⬇
📄 mipsmtregs.h	h	10.9 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mipsprom.h	h	2.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mipsregs.h	h	95.2 KB	26/05/26 09:55	0644	✏️ ⬇
📄 mmiowb.h	h	194 B	10/03/24 20:38	0644	✏️ ⬇
📄 mmu.h	h	555 B	10/03/24 20:38	0644	✏️ ⬇
📄 mmu_context.h	h	6.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 mmzone.h	h	464 B	10/03/24 20:38	0644	✏️ ⬇
📄 module.h	h	2.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 msa.h	h	7.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 msc01_ic.h	h	6.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 paccess.h	h	3.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 page.h	h	6.6 KB	26/05/26 09:55	0644	✏️ ⬇
📄 pci.h	h	3.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 perf_event.h	h	336 B	10/03/24 20:38	0644	✏️ ⬇
📄 pgalloc.h	h	2.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 pgtable-32.h	h	10 KB	10/03/24 20:38	0644	✏️ ⬇
📄 pgtable-64.h	h	9.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 pgtable-bits.h	h	7.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 pgtable.h	h	18.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 pm-cps.h	h	1.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 pm.h	h	3.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 prefetch.h	h	2.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 processor.h	h	11 KB	10/03/24 20:38	0644	✏️ ⬇
📄 prom.h	h	706 B	10/03/24 20:38	0644	✏️ ⬇
📄 ptrace.h	h	5.6 KB	26/05/26 09:55	0644	✏️ ⬇
📄 r4k-timer.h	h	604 B	10/03/24 20:38	0644	✏️ ⬇
📄 r4kcache.h	h	11.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 reboot.h	h	440 B	10/03/24 20:38	0644	✏️ ⬇
📄 reg.h	h	26 B	10/03/24 20:38	0644	✏️ ⬇
📄 regdef.h	h	2.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 rtlx.h	h	2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 seccomp.h	h	810 B	10/03/24 20:38	0644	✏️ ⬇
📄 setup.h	h	969 B	10/03/24 20:38	0644	✏️ ⬇
📄 sgialib.h	h	1.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 sgiarcs.h	h	13.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 shmparam.h	h	352 B	10/03/24 20:38	0644	✏️ ⬇
📄 sigcontext.h	h	1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 signal.h	h	1.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 sim.h	h	2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 smp-cps.h	h	1.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 smp-ops.h	h	2.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 smp.h	h	3.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 sni.h	h	7.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 socket.h	h	1.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 sparsemem.h	h	486 B	10/03/24 20:38	0644	✏️ ⬇
📄 spinlock.h	h	822 B	10/03/24 20:38	0644	✏️ ⬇
📄 spinlock_types.h	h	188 B	10/03/24 20:38	0644	✏️ ⬇
📄 spram.h	h	254 B	10/03/24 20:38	0644	✏️ ⬇
📄 stackframe.h	h	10.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 stackprotector.h	h	1022 B	10/03/24 20:38	0644	✏️ ⬇
📄 stacktrace.h	h	2.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 string.h	h	692 B	10/03/24 20:38	0644	✏️ ⬇
📄 switch_to.h	h	4.4 KB	26/05/26 09:55	0644	✏️ ⬇
📄 sync.h	h	7.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 syscall.h	h	3.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 syscalls.h	h	1.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 thread_info.h	h	6.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 time.h	h	1.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 timex.h	h	2.9 KB	10/03/24 20:38	0644	✏️ ⬇
📄 tlb.h	h	613 B	10/03/24 20:38	0644	✏️ ⬇
📄 tlbdebug.h	h	403 B	10/03/24 20:38	0644	✏️ ⬇
📄 tlbex.h	h	1014 B	10/03/24 20:38	0644	✏️ ⬇
📄 tlbflush.h	h	1.6 KB	10/03/24 20:38	0644	✏️ ⬇
📄 tlbmisc.h	h	320 B	10/03/24 20:38	0644	✏️ ⬇
📄 topology.h	h	619 B	10/03/24 20:38	0644	✏️ ⬇
📄 traps.h	h	2.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 txx9irq.h	h	682 B	10/03/24 20:38	0644	✏️ ⬇
📄 txx9pio.h	h	592 B	10/03/24 20:38	0644	✏️ ⬇
📄 txx9tmr.h	h	1.5 KB	10/03/24 20:38	0644	✏️ ⬇
📄 types.h	h	459 B	10/03/24 20:38	0644	✏️ ⬇
📄 uaccess.h	h	14.7 KB	10/03/24 20:38	0644	✏️ ⬇
📄 uasm.h	h	9.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 unaligned-emul.h	h	26.2 KB	10/03/24 20:38	0644	✏️ ⬇
📄 unistd.h	h	1.9 KB	10/03/24 20:38	0644	✏️ ⬇
📄 unroll.h	h	2.8 KB	10/03/24 20:38	0644	✏️ ⬇
📄 uprobes.h	h	1.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 vdso.h	h	1.4 KB	10/03/24 20:38	0644	✏️ ⬇
📄 vermagic.h	h	2.1 KB	10/03/24 20:38	0644	✏️ ⬇
📄 vga.h	h	1.3 KB	10/03/24 20:38	0644	✏️ ⬇
📄 vmalloc.h	h	90 B	10/03/24 20:38	0644	✏️ ⬇
📄 vpe.h	h	2.7 KB	26/05/26 09:55	0644	✏️ ⬇
📄 watch.h	h	827 B	10/03/24 20:38	0644	✏️ ⬇
📄 wbflush.h	h	694 B	10/03/24 20:38	0644	✏️ ⬇
📄 yamon-dt.h	h	1.7 KB	10/03/24 20:38	0644	✏️ ⬇

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